Teaching

Description: The lab was divided into the following parts:

• Verilog: Part of digital logic, covers combinational and sequential circuit implementation
• X86-64 Assembly: Registers, stack, functions, calling conventions as well as structs
• Performance: Using performance tools such as perf and vtune to recognise microarchitectural bottlenecks
• Simulator: Extended the Champsim Simulator to model various cache designs

Description: The course was divided into four parts - processes, memory, concurrency and IO/file systems. For the first 3 parts, students had to implement basic OS functionality by extending the XV6 OS.